Germanium (Ge) nanowires are formed, by Ge confinement method, as high mobility transistor channels to create logic, memory and low dimensional quantum transport devices. The Ge nanowires are integrated on a Silicon (Si) substrate by preferentially oxidizing SiGe epi layers to confine the Ge atoms in core nanowire region, the Ge nanowires are self-aligned using the Si fin as template. The method also include forming wrap around high dielectric constant gate dielectrics, work function metal, gate control lines, and attaching of electrical terminal contacts to the nanowires thereto. As devices continue to scale, the high mobility germanium nanowire devices provide better control of short channel effects such as sub threshold slop and drain induced barrier lowering.